Synopsys, Inc. has officially announced the launch of new HAPS® prototyping and ZeBu® emulation systems that are designed to leverage the latest AMD Versal™ Premium VP1902 adaptive SoC, marking an expansion of its industry-leading hardware-assisted verification (HAV) portfolio.
According to certain reports, the stated emulation systems arrive on the scene bearing an ability to conceive improved runtime performance, better compile time, and improved debug productivity.
More on this would reveal how the given technology is actually built on new Synopsys Emulation and Prototyping (EP-Ready) Hardware which, on its part, can optimize customer return on investment by enabling emulation and prototyping use cases via reconfiguration and optimized software.
“With the industry approaching 100s of billions of gates per chip and 100s of millions of lines of software code in SoC and multi-die solutions, verification of advanced designs poses never-before seen challenges,” said Ravi Subramanian, chief product management officer at Synopsys. “Continuing our strong partnership with AMD, our new systems deliver the highest HAV performance while offering the ultimate flexibility between prototyping and emulation use. Industry leaders are adopting Synopsys EP-Ready Hardware platforms for silicon to system verification and validation.”
Talk about the given technologies on a slightly deeper level, we begin from how Synopsys HAPS-200 prototyping system seamlessly delivers industry-leading runtime performance and faster compile with 4X improved debug performance over HAPS-100.
Furthermore, it will likely leverage the existing HAPS-100 ecosystem to support mixed HAPS-200/100 system setups that are scalable from single FPGA to multi-rack setups with capacity of up to 10.8 BG.
On the other hand, Synopsys ZeBu-200 emulation system will benefit from an extending design capacity to up to 15.4 BG. This capacity will let the solution offer 2X higher runtime performance, as compared to the previous generation ZeBu EP2. Complementing that would be the prospect of faster compile time, reduced turnaround time, and enhanced development productivity.
Beyond this, the technology also offers up to 8X better debug bandwidth, providing 200 GB debug trace memory per module and improved job scheduling and relocation.
“The future of emulation and prototyping demands unprecedented performance, adaptability, and scalability,” said Salil Raje, senior vice president and general manager, Adaptive and Embedded Computing Group at AMD. “By integrating the AMD Versal Premium VP1902 adaptive SoC, with its industry-leading capacity*, performance, and debug capabilities, into Synopsys’ EP-Ready platforms we’re not only improving performance metrics, we’re also transforming how engineering teams can validate and optimize their most ambitious new ASIC and SoC designs. Our longstanding partnership with Synopsys empowers design teams to tackle their most complex verification challenges, from AI/ML workloads to multi-die architectures.”
We referred to the fact that HAPS-200 and ZeBu-200 systems are built on the Synopsys EP-Ready Hardware platform, but what we haven’t mentioned yet is the said platform’s tendency to support cables and hubs for direct and scalable connectivity. This particular feature allows users to bank upon a broad portfolio of solutions for leading interface protocols through the transactors and speed adaptors.
Another detail worth a mention here is rooted in HAPS prototyping extending Synopsys’ methodology of “Modular HAV” to ZeBu Server 5, growing its industry leading scalability beyond 60 BG to meet the industry’s growing emulation capacity needs. In case you weren’t aware, the given Modular HAV methodology leverages interface protocol solutions that draw their basis from Synopsis’ silicon-proven interface IP.
Apart from that, the innovation also builds upon the company’s hybrid technology, which combines the use of a virtual model running on a host server connected with an HAV system.
“With the increasing market requirements for handling large AI computational data sets driving the need for enormous GPU and CPU computational power, the development time for NVIDIA’s next generation AI systems have become highly compressed to a yearly release cycle, necessitating best-in-class prototyping solutions,” said Narendra Konda, vice president, Hardware Engineering at NVIDIA. “Synopsys HAPS-200 offers the fastest prototyping speed in the industry. The 50 MHz performance we have been able to achieve with HAPS-200 has been key to boosting productivity of our software development teams.”
